The ULSI technology has still been following Moor's Law in the sub-100 nm era, although several challenging issues Must be solved in a practical environment. The first critical issue is, of course, how to make a sub-100 nm fine pattern. The second is to maintain the improvement of performance by lowering the RC delay, keeping a higher drivability of transistors, and Suppressing the total chip power consumption as well as stand by power. The third issue is related to reliability and cost. Reliability relates to all other performance issues, but especially, high-k gate insulator integrity, interconnect reliability, thermal budget and process damage are major concerns. A discussion regarding the promising application of Cat-CVD (also called Hot-wire CVD) for solving these ULSI technology issues, such as low temperature, high-quality nitride Film and hydrogen radical cleaning, is made in this paper. (c) 2005 Published by Elsevier B.V.