The current transport mechanisms and the charge trapping characteristics of WO, gate dielectrics prepared by different annealing conditions were studied. We found that the large leakage currents are mostly associated with the high trap density in the dielectric films. Taking into account the ionic nature of the metal oxide, the phonon-assisted trap ionization model should be used to explain this behavior. For samples with high temperature annealing in oxygen, large barriers of over 2 eV were found from the Fowler-Nordheim plots. These values were attributed to the existence of an interface silicon oxide layer. The effective interface barrier is also governed by the bulk properties of HfO2 film, which modifies the field strength in the interface oxide layer according to the Gauss law. The reliability of the gate dielectric can be improved by the formation of interface SiO2 layer but stoichiometric improvement in the HfO2 layer has an adverse effect on the stressing induced charge trapping due to the interface barrier lowering effect. (c) 2005 Elsevier B.V. All rights reserved.