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Journal of the Electrochemical Society, Vol.153, No.9, G866-G869, 2006
Thick gate oxide integrity improvement by sulfuric peroxide mixture cleaning after thick gate oxide etch
Dual-gate complimentary metal oxide semiconductor (CMOS) processes are widely used for both normal integrated circuit (IC) operating at 1.5 and 3.3 V in 0.15 mu m CMOS technology. The thick oxide constructed by a dual-gate oxide process shows intrinsic inferior quality to single-step grown thin oxide due to the difference in its fabrication process, mainly the double-growing scheme. The gate oxide integrity of the thick gate oxide was found to be very susceptible to the cleaning solution performed after thick gate oxide etching. Sulfuric peroxide mixture (SPM) solution yielded much better gate oxide integrity performance of thick gate oxide for high-voltage transistors than SPM + ammonium peroxide mixture (APM) and APM + hydro peroxide mixture (HPM) as the cleaning solution. This performance is attributed to the decreased microroughness of the gate oxide and the high organic impurity removal efficiency of SPM cleaning alone.