Even now there are no device simulators that can model hole carrier transport in p-channel Si or SiGe metal-oxide-semiconductor field-effect transistors (MOSFETs), by properly addressing the issues of hole band-structure and quantum confinement effects. The purpose of this work is to remedy this situation by presenting an approach to modeling p-channel devices using a two-dimensional (2D) Monte Carlo transport kernel that is coupled self-consistently to a 2D Poisson equation solver and to a six band k - p band-structure module. The need for full band solver for hole transport is especially true in the case of surface channel strained Si and buried channel strained SiGe p-MOSFETs investigated here. We have paid special attention on properly implementing and investigating the role of interface roughness on the operation of these device structures. We find that SiGe p-channel MOSFETs show performance improvement only for low gate and drain biases; i.e., when the device is operated in subthreshold and weak inversion regime and carrier spillover into the surface channel and surface roughness do not play significant role on the device operation. (c) 2006 American Vacuum Society.