A technique for predicting wafer temperature was developed, and a model for predicting critical dimension (CD) was devised. Using this technique and model in combination makes it possible to calculate wafer temperature during gate etching within an accuracy of 1 degrees C and to predict CD distribution after plasma etching. Etching at a temperature for uniform CD given by the CD prediction model reduces the CD variation (3 sigma) during gate etching from 2.3 to 1.5 nm. Applying this temperature prediction technique and CD prediction model together will contribute to improving etching apparatus design and process development. (c) 2006 Elsevier B.V. All rights reserved.