We examined the effect of shallow trench isolation (STI) process for the Si ultralarge-scaled integrated circuit on the thermal stability of the bar resistance (R-s) and the internal void formation of sputtered-TiSi2/poly-Si gate electrodes. Among the examined process variables, the STI step height can strongly affect the density of voids formed between the poly-Si and the TiSi2 films after the silicidation annealing. Above a STI step height of 400 Angstrom, many clear voids were observed at the STI boundaries by scanning electron microscopy. The thermal stability of the sheet resistance (R-s) for the TiSi2/poly-Si gate electrode was investigated at various STI step heights and Si/Ti molar ratios (x) of the TiSix composite target. With the decrease in STI step height from 400 to 200 Angstrom, the average R-s at a 0.16 mum linewidth was enhanced from similar to60 to 15 Omega/square after postannealing at 800degreesC for 2 h. With the increase of x from 2.1 to 2.3, the thermal stability of R-s was also greatly enhanced showing an average R-s of similar to15 Omega/square at a 400 Angstrom STI step height. From this study, we suggest that the stress-induced voiding at TiSi2/poly-Si interface plays one of key roles in thermal degradation of R-s due to the highly developed triaxial stress state in the gate electrode film. (C) 2002 The Electrochemical Society.