A novel isolation method of the silicon pillarlike structures, such as FinFET and lateral bipolar transistors, suitable for the future system-on-a-chip bipolar complementary metal oxide semiconductor (BiCMOS) integration is presented. The new structures are isolated by the deposition of low-temperature oxide after the pillar etching, followed by chemical mechanical polishing (CMP) and oxide etchback. A novel CMP setup is used, employing a rigid Teflon pad and the slurry composed of the gamma alumina powder diluted in deionized water with 2.5 wt % of KOH. The oxide above the 1.8 mu m high pillars is planarized with 96% efficiency resulting in a flat, scratch-free isolation oxide surface. (C) 2005 The Electrochemical Society.