A fully integrated fractional-N frequency synthesizer (FNFS) in 0.5 mum SiGe BiCMOS technology is implemented. To cover wideband frequency operation, a switched capacitor bank LC tank VCO and an Adaptive Frequency Calibration (AFC) technique are used. A 3-bit 4th order Sigma-Delta modulator is used to reduce out-of-band phase noise and to meet a frequency resolution of less than 3 Hz, and agile switching time. The experimental results show -80 dBc/Hz in-band phase noise within the loop bandwidth of 25 kHz and -129 dBc/Hz out-of-band phase noise at 400 kHz-offset frequency. The fractional spurs are less than -70 dBc/Hz at 300 kHz offset frequency and the reference spur is -75 dBc/Hz. The lock time is less than 150 mus. The proposed synthesizer consumes 19.5 mA from a simile 2.8 V supply voltage and meets the requirements of GSM/GPRS/EDGE applications. (C) 2004 Elsevier B.V. All rights reserved.