An extended study of the occurrence of inherent parasitic bipolar effects in conventional and graded-channel fully depleted silicon-on-insulator nMOSFETs is carried out. The graded-channel device is a new asymmetric channel MOSFET, fabricated through a simple process variation. Measurements and two-dimensional simulations are used to demonstrate that the graded-channel device efficiently alleviates the parasitic BJT action, improving the breakdown voltage, by the reduction of impact ionization in the high electric field region. Based on process/device simulation and modeling, multiplication factor and parasitic bipolar gain, which are the responsible parameters for the parasitic BJT action, are investigated separately providing a physical explanation. The abnormal subthreshold slope and hysteresis phenomenon are also studied and compared.