An analytical model of the temperature distribution in integrated circuits is presented. The solution is based on a classic method of electrostatics: the integration of the temperature field produced by a point source. Using this approach, the temperature distribution is expressed by a closed-form analytical relation, while previous approaches involve the summation of a slowly convergent series (Fourier series method) or a numerical integration procedure (Fourier transform method). Therefore, the present approach is much more computationally effective, and is particularly suitable for being incorporated into electro-thermal simulation codes. Another significant advantage of the proposed analytical formulation is that a more clear understanding of the influence of geometric and layout parameters on the thermal behavior can be gained. The analysis applies to arbitrarily located surface or volume heat sources. Boundary conditions are properly taken into account using the method of images. Finally, an accurate analytical expression for the thermal resistance of an integrated device is derived, which accounts for all relevant geometric parameters. This result may be a useful guideline in the early stages of layout optimization.