Solid-State Electronics, Vol.46, No.2, 243-247, 2002
The impact of post-polysilicon gate process on ultra-thin gate oxide integrity
The impact of rapid-thermal spike anneal after source/drain extension (SDE) implant on the integrity of ultra-thin gate oxide is studied. It is found that SDE anneal can cause increasingly severe gate oxide integrity (GOI) degradation as the gate oxide becomes thinner. The GOI degradation can be suppressed by growing a thin oxide on the polysilicon gate or inserting an offset spacer prior to the SDE implant step. Additionally, a close correspondence between GOI degradation, gate to source/drain leakage current, and the bridging of dense polysilicon lines is observed, indicating a common origin for these phenomena. (C) 2002 Published by Elsevier Science Ltd.
Keywords:MOS devices;ultra-thin gate oxide;polysilicon gate;gate oxide integrity;rapid-thermal spike anneal;offset spacer