A general model for the dependence of integrated device thermal resistance on substrate backside temperature and power dissipation for Si, InP and GaAs substrates is derived by consideration of the role of temperature dependent thermal conductivity in each of these effects. Linearization of these model components is carried out to extract computationally simple expressions that retain very close agreement to the full equations. A parameter extraction and scaling procedure is developed which allows the linearized models to be used in a practical modeling environment. The performance of extracted and scaled model parameters in predicting thermal resistance is compared to measurements for InP substrate devices, and the agreement and predictions are found to be within 5% of measurements for two geometries, for power levels to 3 mW/mum(2) and over a 165 degreesC substrate temperature range. The InP device model is also implemented as a subcircuit in hspice using behavioral sources, and the results confirmed with circuit simulation. (C) 2002 Published by Elsevier Science Ltd.