Device simulation is applied to the comparison of the RF and noise performance of bulk and single-gate ultra-thin SOI MOSFETs, with gate length in the range 70-100 nm. The results of our analysis point out that for a 70 nm gate length, the AC performance of ultra-thin Sol devices are limited by the parasitic source and drain resistances. The analysis of noise in these MOS structures, show that they are affected by comparable drain thermal noise; on the contrary, differences between the bulk and the Sol MOSFETs exist in terms of induced gate thermal noise and shot noise associated to the gate leakage current. (C) 2003 Elsevier Ltd. All rights reserved.