In this paper, we present a computationally efficient model to calculate the direct tunneling current from an inverted p-type (10 0) Si substrate through interfacial SiO2 and high-K gate stacks. This model consists of quantum mechanical calculations for the inversion layer charge density and a modified WKB approximation for the transmission probability. The modeled direct tunneling currents agree well with a self-consistent model and experimental data. For the same effective oxide thickness (EOT) of 2 nm, the direct tunneling current of a HfO2 high-K dielectric (6.4 nm, K-f = 25) overlaying a I nm thermal oxide is reduced by four orders of magnitude compared with a pure SiO2 film at low gate voltages. The effects of interfacial oxide thickness, dielectric constant and barrier height on the direct tunneling current have also been studied as a function of gate voltages. (C) 2004 Elsevier Ltd. All rights reserved.