We used focused ion beam (FIB) techniques to construct junction field effect transistors (JFETs) on a mesa of n-type silicon on an Sol chip. The implantation and metal contacts were made by FIB, which suggests that this technique can be used to make transistors in a non-standard geometry, such as the tip of a scanning probe or on a MEMS structure. FIB dopant implantation was used to direct-write the source, gate, and drain regions of each device. Several proof-of-concept devices were made with FIB deposited platinum as contacts to demonstrate the technique's potential. Other devices were created with conventional aluminum contacts instead of FIB deposited platinum to investigate the effect of variable gate doping on device characteristics. All devices were 90 mum by 90 mum with a gate length of I mum. A graded doping profile was found to be an effective means of decreasing the short-channel effects that result in increasing source-drain current past saturation. (C) 2004 Elsevier Ltd. All rights reserved.