In this work, we show flow to manipulate two-dimensional arrays of Si NCs in thin (<= 10 nm) SiO2 layers by ultra-low-energy (<= 1 keV) ion implantation and subsequent thermal annealing. The influence of implantation parameters (dose, energy), annealing conditions (temperature, duration, ambient) and oxide thickness on the NCs characteristics (position, size, density) is reported. Particular emphasis is placed upon post-implantation thermal treatments performed in nitrogen-diluted-oxygen ambient that significantly improve the integrity of the oxide and allow for the fabrication of non-volatile memory devices operating at low-gate voltages. Thermal oxidation in N-2-diluted-O-2 of high-temperature pre-formed silicon NCs has been also examined and modeled using an extended three-dimensional Deal-Grove model. This model reveals that stress effects, due to the deformation of the oxide, slow down the chemical oxidation rate and lead to a self-limiting oxidation of NCs. The model predictions are ill agreement with the experimental results. (c) 2005 Elsevier Ltd. All rights reserved.