화학공학소재연구정보센터
Solid-State Electronics, Vol.50, No.4, 579-586, 2006
A robust 45 nm gate-length CMOSFET for 90 nm Hi-speed technology
We have developed a robust 45 nm gate-length CMOSFET for 90 mn node high performance application. Aggressive gate length and gate dielectric scaling along with optimized strain engineering enable high performance device similar to 65 nm node CMOSFET [Nakahara Y, et al. IEDM Tech Dig 2003;281] We have utilized oxy-nitride gate with post-nitridation anneal, high ramp rate spike anneal, low temperature spacer scheme and stress controlled SiN contact etch stop liner process in order to improve drive current as well as transistor short-channel roll-off. In particular, we will focus on the study of middle-of-line (MOL) process parameters, (i.e. MOL thermal expense and mechanical stress from contact etch stop liner) on transistor performance and reliability. Based on the study, we have obtained device exhibit drive-current of 900/485 mu A/mu m for NMOSFET and PMOSFET, respectively, at standard supply voltage of 1V. (c) 2006 Elsevier Ltd. All rights reserved.