In this paper, we propose for the first time a novel device structure known as the tri-control gate surrounding gate transistor (TCG-SGT) nonvolatile memory cell for Flash memory. In the TCG-SGT nonvolatile memory cell, the control gate, floating gate, drain and source are arranged vertically on the substrate. In addition, the control gate covers the outside of the floating gate. The body region is isolated from the substrate by the source region located at the bottom of the silicon pillar. In addition, we derive the coupling ratio of the TCG-SGT nonvolatile memory cell and compare it with the coupling ratio of the conventional floating channel (FC)-SGT Flash memory cell. The TCG-SGT nonvolatile memory cell architecture produces a capacitive-coupling ratio that is substantially higher than the capacitive-coupling ratio produced by conventional Flash memory devices, which would mean significant improvements in device performance. Finally, through process simulation, we also propose a potential fabrication process of the TCG-SGT nonvolatile memory cell structure. (c) 2006 Elsevier Ltd. All rights reserved.