화학공학소재연구정보센터
Solid-State Electronics, Vol.52, No.7, 1024-1031, 2008
Investigation of the non-linear input capacitance in LDMOS transistors and its contribution to IMD and phase distortion
In this paper the mechanisms causing the capacitive, reactive non-linearities in a lateral double diffused MOS, LDMOS, transistor are investigated. The non-linear input capacitance under load-line power match is extracted and analyzed. Computational TCAD load-pull is used to analyze the effect of non-linear capacitance on two-tone intermodulation distortion and AM-PM conversion in class-A operation. High-frequency measurements have been made to verify the use of 2D numerical device simulations for the analysis. It is found that the input capacitance, C-gg, of the LDMOS transistor working under power match conditions is a strongly non-linear function of gate voltage V-g but with an almost linear initial increase in C-gg. The voltage dependence of C-gg is found to mainly affect higher order IMD products in class-A operation. Transient simulations however show that C-gg seriously contributes to the onset of AM-PM conversion well below the 1 dB compression point. (C) 2008 Elsevier Ltd. All rights reserved.