Accurate thermal modeling is critical to address the heating-related problems in integrated circuits, as well as to ensure as-designed operation or to obtain performance predictions in a range of different operating conditions. We present Our experimental and theoretical work on modeling thermal behavior in integrated circuits (ICs) at the resolution of single material layers. Through measurements and simulations we find that lateral metal interconnect networks have minimal effect on directing heat flow in bulk technologies, but may be more influential in SOI systems. Thermal via structures are effective for temperature reduction in either case. With this approach we are able to contribute to the IC design process by Suggesting metal layout features for cooling and controlled heating. (C) 2009 Elsevier Ltd. All rights reserved.