A physically based, quantum mechanical (QM) model is presented for simulating low frequency gate C-V characteristics of MOS devices on arbitrary substrates including interface trap (D-it) effects. MOS electrostatics is determined from the self-consistent solution of one-dimensional Schrodinger's and Poisson's equations considering wave function penetration into the gate dielectric. The effects of strain and/or the variation of material composition in each layer of MOS structures on non-conventional substrates are also included in the model. The proposed model can support arbitrary D-it distributions (both donor and acceptor types) within the entire bandgap as well as within the conduction and the valence bands. Comparisons with two other existing C-V models are also made. Numerical results show that for accurate simulation of the low frequency C-V characteristics, the energy distributions of the D-it over the entire bias range and a model that considers QM effects with wave function penetration are necessary. Excellent agreement with published experimental data for MOS structures on Si, Ge and III-V substrates is achieved through appropriate selection of the D-it distributions. The proposed model can be used to extract D-it profiles of MOS structures on alternative substrates by comparing with measured low frequency C-V characteristics and to verify the accuracy of D-it profiles extracted using other techniques. (C) 2010 Elsevier Ltd. All rights reserved.