A systematic study of metal-catalyzed etching of (100), (110), and (111) silicon substrates using gold catalysts with three varying geometrical characteristics: isolated nanoparticles, metal meshes with small hole spacings, and metal meshes with large hole spacings is carried out. It is shown that for both isolated metal catalyst nanoparticles and meshes with small hole spacings, etching proceeds in the crystallographically preferred < 100 > direction. However, the etching is confined to the single direction normal to the substrate surface when a catalyst meshes with large hole spacings is used. We have also demonstrated that the metal catalyzed etching method when used with metal mesh with large hole spacings can be extended to create arrays of polycrystalline and amorphous vertically aligned silicon nanowire by confining the etching to proceed in the normal direction to the substrate surface. The ability to pattern wires from polycrystalline and amorphous silicon thin films opens the possibility of making silicon nanowire array-based devices on a much wider range of substrates.