Iterative reconstruction algorithms are becoming increasingly important in electron tomography of biological samples. These algorithms, however, impose major computational demands. Parallelization must be employed to maintain acceptable running times. Graphics Processing Units (GPUs) have been demonstrated to be highly cost-effective for carrying out these computations with a high degree of parallelism. In a recent paper by Xu et al. (2010), a CPU implementation strategy was presented that obtains a speedup of an order of magnitude over a previously proposed CPU-based electron tomography implementation. In this technical note, we demonstrate that by making alternative design decisions in the CPU implementation, an additional speedup can be obtained, again of an order of magnitude. By carefully considering memory access locality when dividing the workload among blocks of threads, the CPU's cache is used more efficiently, making more effective use of the available memory bandwidth. (C) 2011 Elsevier Inc. All rights reserved.