화학공학소재연구정보센터
Composite Interfaces, Vol.18, No.3, 251-258, 2011
Low-Voltage P3HT Field-Effect Transistors Fabricated Using High-k Gate Insulators
Hafnium silicate (HfSiO5) thin film (epsilon(r) = 7.7) and strontium titanate (SrTiO3) thin film (epsilon(r) = 12.1) were prepared on a heavily doped n-type silicon wafer by sputtering. Wet-processed P3HT field-effect transistors (FETs) fabricated using the self-assembled monolayer (SAM)-treated HfSiO5 or SAM-free SrTiO3 as a gate insulator showed saturated output characteristics at a driving voltage as low as -10 V for HfSiO5 and -3 V for SrTiO3. Hole mobilities of P3HT-FETs fabricated on the HfSiO5 and the SrTiO3 were 1.1 x 10(-3) and 5.7 x 10(-3) cm(2)/Vs, respectively. (C) Koninklijke Brill NV, Leiden, 2011