Current Applied Physics, Vol.9, No.1, 9-12, 2009
Fabricating high performance n-channel lateral double diffused metal-oxide-semiconductor transistors utilizing the shallow trench isolation as a salicide blocking mask of the drift region
In this paper, the improved characteristics of 10 V tolerant high-voltage n-channel lateral double diffused metal-oxide-semiconductor devices, using a pure 0.25 mu m standard low-voltage complementary metal-oxide-semiconductor (CMOS) logic process with dual Late oxide, are described. The fabricated transistors showed about 30% better Current driving characteristics and about 40% higher drain operating voltage than previous reports of these kinds of devices. The transistors maintained a breakdown voltage, BVDSS, over 14 V. These devices also showed good sub-threshold characteristics. This paper describes the cost-effective and high performance n-channel high-voltage LDMOS using a pure low-voltage standard CMOS logic process. (C) 2007 Elsevier B.V. All rights reserved.
Keywords:breakdown voltage;drift;high-voltage;LDMOS;on-resistance;saturation drain current;standard logic process;system on a chip