In this study, the characteristics of positive bias temperature instability (PBTI) and cyclic constant voltage stress (CVS) in thin film transistors (TFTs) incorporating Ni-FALC poly-Si film were investigated under various stress conditions. In PBTI, the threshold voltage (V(TH)) was degraded by a vertical electric field on the gate stack, and an abrupt variation of VTH was attributed to the creation of defects in the gate oxide and the increase of the effective interface trap state. In contrast to the formation of defects, the poly-Si film was not sensitive to PBTI stress (the fluctuation in the grain boundary trap density was just 5.6%). In two-cycle CVS of devices before and after O(2) plasma treatment, the direction of the VTH shift and polarity of bias showed good correlation. In particular, the O(2) plasma-treated device demonstrated low Subthreshold swing (S. S) and low minimum drain current compared to the untreated one. The improvement of device performance seemed to originate from the reduction of effective interface trap sites and leakage current paths. (C) 2011 Published by Elsevier B. V.