| 초록 |
In this work, we demonstrate the fabrication of thin and densified sol–gel metal oxide films for gate dielectric layers by a simple bar-printing method in large-area printed metal oxide thin-film transistor arrays. The thickness of single-coated aluminum oxide and hafnium oxide dielectric films can be accurately controlled with a nanometer resolution (10 – 40 nm) by adjustable rheological factors (various bar-shearing speeds and the precursor concentrations), whereas thick metal oxide dielectric films (~100 nm) are accomplished by repeated sol–gel oxide coatings. The fabricated high-quality oxide dielectric layers show remarkable results of very smooth surface morphology with excellent insulating properties, performing very low leakage current density in the range of 10–8 A cm-2 at 2 MV cm-1 and very high areal capacitance of over 400 nF cm-2, in company with very uniform large-area coverage up to 4-inch silicon wafer. Lastly, in combination with direct-oxide patterning process via selective surface wettability, solution-bar-coated metal oxide transistor arrays were achieved using a self-patterned sol-gel indium–gallium–zinc oxide semiconductor on the aluminum oxide-coated dielectric layer, which obtain sufficient transistor performance along with electron mobilities of ＞5 cm2 V-1 s-1, high current on–off ratios of 105, and minimal gate leakage current in the stable range of 10–9 A cm-2 at a very low operation voltage below 2 V. |
