| 초록 |
In the past two decades, there has been a significant paradigm shift in Memory Devices. Specifically, (DRAM: Planer -＞ RCAT -＞ BCAT, FLASH: Planer -＞ 3D V-NAND (24nm), and LOGIC: HK/MG -＞ FinFET (14nm) -＞ GAA). These new innovations and technologies represent significant improvements from the current systems. Looking at it from the perspective of the Metal Process, we can analyze the ALD_TiN Film used in DRAM Cell Capacitor supporter and 3D NAND W/L barrier metal. In order to increase the capacities of DRAM Cells, the number of Capacitor Nodes has been increased. In order to prevent bending issues of nodes (high Aspect ratio), ALD_TiN has to be created in high temperature for High Density, Good Step Coverage to be functional. To satisfy these need, the use of different Capacitor materials and innovations around shift from ZAZ to ZAZA….. are being thoroughly researched. In 3D V-NAND, as height of ON Stack increases, W/L (high surface area /Gate W B/M) Gapfill becomes increasingly difficult. The combination of low temperature ALD-TiN / ALD-W is being used to solve the complicated Gate Gapfill Process. In response to the evolving Device, the research facility has successfully developed a TiCl4 gas base’s ALD_TiN Film using the New Platform, achieving greater productivity and stability. By developing the Low Thickness TiN Film used in 3D-NAND W/L B/M under 430~450 degrees, results of Step coverage above 98%, Film Continuity under 35A, and Density above 4.5g/cc have been successfully achieved. Also, by developing the TiN Film used in DRAM Capacitor (Storage and Plate) in high temperature of above 520~650 degrees, result of Good Step Coverage above 96% has been successfully achieved. This allowed for Cell Capacitor’s stability. Through multiple simulations of Shower Head, Gas Path and chamber designs optimized for ALD Process, system that stabilizes gas purging and pumping was created. The resulting high quality TiN Film has D/R=0.30A~0.45A/cycle and Cl level (SIMS/count) of less than 3xE-3. |
