| 초록 |
Herein, highly promising self-rectifying resistive memory cell (SRMC) that exhibits large selectivity (ca. 104), two-bit operation, low read power (4 and 0.8 nW for low and high resistance states, respectively), read latency (＜ 10μs), excellent non-volatility (retention ＞104s at 85 ℃), and complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤ 5 V) was investigated. Furthermore, the SRMC showed the low programming power (ca. 18 nW), programming latency (100 μs), endurance (＞106), and read disturbance (ca. 1010). These highly reliable and energy efficient characteristics render the SRMC suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Based on the negligible cell to cell variability, large asymmetry and nonlinearity behavior, the SRMCs were embedded in the different sizes of passive crossbar array (30 × 30, 160 × 160, and 320 × 320). Using the integrated crossbar arrays, the appropriate bias schemes were investigated according to the given array density and SRMC characteristics. Furthermore, to investigate the feasibility for memory-centric computing applications, Vector-matrix multiplication (VMM) acceleration and two - bits operation were demonstrated. These highly promising characteristics and feasible operation of the crossbar array embedded SRMC verify its potential for main memory of memory-centric computing. The detailed experimental process, electrical measurement results, microscopic chemical analyses and simulation results will be included in presentation materials. |
