검색결과 : 3건
| No. | Article |
|---|---|
| 1 |
Fabrication and testing of through-silicon vias used in three-dimensional integration Abhulimen IU, Kamto A, Liu Y, Burkett SL, Schaper L Journal of Vacuum Science & Technology B, 26(6), 1834, 2008 |
| 2 |
Effect of process parameters on via formation in Si using deep reactive ion etching Abhulimen IU, Polamreddy S, Burkett S, Cai L, Schaper L Journal of Vacuum Science & Technology B, 25(6), 1762, 2007 |
| 3 |
Back side exposure of variable size through silicon vias Rowbotham T, Patel J, Lam T, Abhulimen IU, Burkett S, Cai L, Schaper L Journal of Vacuum Science & Technology B, 24(5), 2460, 2006 |