검색결과 : 4건
| No. | Article |
|---|---|
| 1 |
Capacitance estimation for In As Tunnel FETs by means of full-quantum k . p simulation Gnani E, Baravelli E, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 108, 104, 2015 |
| 2 |
V-DD scalability of FinFET SRAMs: Robustness of different design options against LER-induced variations Baravelli E, De Marchi L, Speciale N Solid-State Electronics, 54(9), 909, 2010 |
| 3 |
Fin shape fluctuations in FinFET: Correlation to electrical variability and impact on 6-T SRAM noise margins Baravelli E, De Marchi L, Speciale N Solid-State Electronics, 53(12), 1303, 2009 |
| 4 |
Wavelet-based adaptive mesh generation for device simulation De Marchi L, Franze F, Baravelli E, Speciale N Solid-State Electronics, 50(4), 650, 2006 |