검색결과 : 7건
| No. | Article |
|---|---|
| 1 |
New insights on SOI Tunnel FETs with low-temperature process flow for CoolCube (TM) integration Llorente CD, Le Royer C, Batude P, Fenouillet-Beranger C, Martinie S, Lu CMV, Allain F, Colinge JP, Cristoloveanu S, Ghibaudo G, Vinet M Solid-State Electronics, 144, 78, 2018 |
| 2 |
FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration Fenouillet-Beranger C, Previtali B, Batude P, Nemouchi F, Casse M, Garros X, Tosti L, Rambal N, Lafond D, Dansas H, Pasini L, Brunet L, Deprat F, Gregoire M, Mellier M, Vinet M Solid-State Electronics, 113, 2, 2015 |
| 3 |
Influence of device architecture on junction leakage in low-temperature process FDSOI MOSFETs Sklenard B, Batude P, Rafhay Q, Martin-Bragado I, Xu CQ, Previtali B, Colombeau B, Khaja FA, Cristoloveanu S, Rivallin P, Tavernier C, Poiroux T Solid-State Electronics, 88, 9, 2013 |
| 4 |
Revisited approach for the characterization of Gate Induced Drain Leakage Rafhay Q, Xu CQ, Batude P, Mouis M, Vinet M, Ghibaudo G Solid-State Electronics, 71, 37, 2012 |
| 5 |
Probing buried interfaces on Ge-based metal gate/high-k stacks by hard X-ray photoelectron spectroscopy Rubio-Zuazo J, Martinez E, Batude P, Clavelier L, Chabli A, Castro GR Applied Surface Science, 257(7), 3007, 2011 |
| 6 |
Low temperature boron and phosphorous doped SiGe for recessed and raised sources and drains Hartmann JM, Py M, Barnes JP, Previtali B, Batude P, Billon T Journal of Crystal Growth, 327(1), 68, 2011 |
| 7 |
High mobility CMOS: First demonstration of planar GeOI p-FETs with SOI n-FETs Le Royer C, Damlencourt JF, Vincent B, Romanjek K, Le Cunff Y, Grampeix H, Mazzocchi V, Carron V, Nemouchi F, Hartmann JM, Arvet C, Vizioz C, Tabone C, Hutin L, Batude P, Vinet M Solid-State Electronics, 59(1), 2, 2011 |