검색결과 : 7건
| No. | Article |
|---|---|
| 1 |
Low frequency noise variability in ultra scaled FD-SOI n-MOSFETs: Dependence on gate bias, frequency and temperature Theodorou CG, Ioannidis EG, Haendler S, Josse E, Dimitriadis CA, Ghibaudo G Solid-State Electronics, 117, 88, 2016 |
| 2 |
Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit Arshad MKM, Kilchytska V, Emam M, Andrieu F, Flandre D, Raskin JP Solid-State Electronics, 97, 38, 2014 |
| 3 |
Quasi-double gate regime to boost UTBB SO MOSFET performance in analog and sleep transistor applications Kilchytska V, Bol D, De Vos J, Andrieu F, Flandre D Solid-State Electronics, 84, 28, 2013 |
| 4 |
UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime Arshad MKM, Makovejev S, Olsen S, Andrieu F, Raskin JP, Flandre D, Kilchytska V Solid-State Electronics, 90, 56, 2013 |
| 5 |
Modeling of low frequency noise in FD SOI MOSFETs El Husseini J, Martinez F, Valenza M, Ritzenthaler R, Lime F, Iniguez B, Faynot O, Le Royer C, Andrieu F Solid-State Electronics, 90, 116, 2013 |
| 6 |
Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit Kilchytska V, Arshad MKM, Makovejev S, Olsen S, Andrieu F, Poiroux T, Faynot O, Raskin JP, Flandre D Solid-State Electronics, 70, 50, 2012 |
| 7 |
Impact of self-heating and substrate effects on small-signal output conductance in UTBB SOI MOSFETs Makovejev S, Raskin JP, Arshad MKM, Flandre D, Olsen S, Andrieu F, Kilchytska V Solid-State Electronics, 71, 93, 2012 |