검색결과 : 2건
| No. | Article |
|---|---|
| 1 |
Experimental demonstration of strained Si nanowire GAA n-TFETs and inverter operation with complementary TFET logic at low supply voltages Luong GV, Strangio S, Tiedemannn A, Lenk S, Trellenkamp S, Bourdelle KK, Zhao QT, Mantl S Solid-State Electronics, 115, 152, 2016 |
| 2 |
Si tunneling transistors with high on-currents and slopes of 50 mV/dec using segregation doped NiSi2 tunnel junctions Knoll L, Schmidt M, Zhao QT, Trellenkamp S, Schafer A, Bourdelle KK, Mantl S Solid-State Electronics, 84, 211, 2013 |