검색결과 : 5건
| No. | Article |
|---|---|
| 1 |
Extraction method for parasitic capacitances and inductances of HEMT models Zhang HS, Ma PJ, Lu Y, Zhao BC, Zheng JX, Ma XH, Hao Y Solid-State Electronics, 129, 108, 2017 |
| 2 |
Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit Arshad MKM, Kilchytska V, Emam M, Andrieu F, Flandre D, Raskin JP Solid-State Electronics, 97, 38, 2014 |
| 3 |
Comparative study of circuit perspectives for multi-gate structures at sub-10 nm node Lacord J, Huguenin JL, Monfray S, Coquand R, Skotnicki T, Ghibaudo G, Boeuf F Solid-State Electronics, 74, 25, 2012 |
| 4 |
A compact model of fringing field induced parasitic capacitance for deep sub-micrometer MOSFETs Liu X, Jin X, Lee JH Solid-State Electronics, 53(9), 1041, 2009 |
| 5 |
Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications Moldovan O, Cerdeira A, Jimenez D, Raskin JP, Kilchytska V, Flandre D, Collaert N, Iniguez B Solid-State Electronics, 51(5), 655, 2007 |