| 1 |
Temperature dependent compact modeling of gate tunneling leakage current in double gate MOSFETs
Darbandy G, Aghassi J, Sedlmeir J, Monga U, Garduno I, Cerdeira A, Iniguez B
Solid-State Electronics, 81, 124, 2013 |
| 2 |
Explicit model for the gate tunneling current in double-gate MOSFETs
Chaves F, Jimenez D, Sune J
Solid-State Electronics, 68, 93, 2012 |
| 3 |
Explicit model for direct tunneling current in double-gate MOSFETs through a dielectric stack
Chaves F, Jimenez D, Sune J
Solid-State Electronics, 76, 19, 2012 |
| 4 |
Method of extracting effective channel length for nano-scale n-MOSFETs
Choi HW, Lee NH, Kang HS, Kang BK
Solid-State Electronics, 53(10), 1076, 2009 |
| 5 |
Reduction of gate-to-channel tunneling current in FinFET structures
Rudenko T, Kilchytska V, Collaert N, Jurczak M, Nazarov A, Flandre D
Solid-State Electronics, 51(11-12), 1466, 2007 |
| 6 |
Comprehensive noise performance of ultrathin oxide MOSFETs at low frequencies
Lee J, Bosman G
Solid-State Electronics, 48(1), 61, 2004 |
| 7 |
Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs
Dieudonne F, Haendler S, Jomaah J, Balestra F
Solid-State Electronics, 48(6), 985, 2004 |
| 8 |
The impact of gate oxide scaling (3.2-1.2 nm) on sub-100 nm complementary metal-oxide-semiconductor field-effect transistors
Yeh WK, Lin CY
Thin Solid Films, 419(1-2), 218, 2002 |
