검색결과 : 20건
| No. | Article |
|---|---|
| 1 |
SOI MESFETs on high-resistivity, trap-rich substrates Mehr P, Zhang X, Lepkowski W, Li CJ, Thornton TJ Solid-State Electronics, 142, 47, 2018 |
| 2 |
RF SOI CMOS technology on 1st and 2nd generation trap-rich high resistivity SOI wafers Esfeh BK, Makovejev S, Basso D, Desbonnets E, Kilchytska V, Flandre D, Raskin JP Solid-State Electronics, 128, 121, 2017 |
| 3 |
Steep subthreshold slope characteristics of body tied to gate NMOSFET in partially depleted SOI Song L, Hu ZY, Liu ZL, Xin HW, Zhang ZX, Zou SC Solid-State Electronics, 130, 15, 2017 |
| 4 |
Radiation-enhanced gate-induced-drain-leakage current in the 130 nm partially-depleted SOI pMOSFET Peng C, Hu ZY, Ning BX, Dai LH, Bi DW, Zhang ZX Solid-State Electronics, 106, 81, 2015 |
| 5 |
Avalanche breakdown in SOI MESFETs Lepkowski W, Wilk SJ, Parsi A, Saraniti M, Ferry D, Thornton TJ Solid-State Electronics, 91, 78, 2014 |
| 6 |
Function of the parasitic bipolar transistor in the 40 nm PD SOI NMOS device considering the floating body effect Chena CH, Kuo JB, Chen D, Yeh CS Solid-State Electronics, 70, 3, 2012 |
| 7 |
PSP-SOI: An advanced surface potential based compact model of partially depleted SOI MOSFETs for circuit simulations Wu W, Li X, Gildenblat G, Workman GO, Veeraraghavan S, McAndrew CC, van Langevelde R, Smit GDJ, Scholten AJ, Klaassen DBM, Watts J Solid-State Electronics, 53(1), 18, 2009 |
| 8 |
An area efficient body contact for low and high voltage SOI MOSFET devices Daghighi A, Osman M, Imam MA Solid-State Electronics, 52(2), 196, 2008 |
| 9 |
High-temperature DC and RF behaviors of partially-depleted SOI MOSFET transistors Emam M, Tinoco JC, Vanhoenacker-Janvier D, Raskin JP Solid-State Electronics, 52(12), 1924, 2008 |
| 10 |
Temperature impact on the Lorentzian noise induced by electron valence-band tunneling in partially depleted SOI p-MOSFETs Guo W, Cretu B, Routoure JM, Carin R, Simoen E, Claeys C Solid-State Electronics, 51(9), 1180, 2007 |