SiC power MOSFETs is a promising candidate for the normally-off type fast switching device in the next generation. However, the on-resistance of SiC power MOSFETs is almost the same as that of Si IGBTs, which is much higher than the calculated value. This is caused by the low channel mobility due to high interface trap density. Large improvement of channel mobility is expected for SiC power MOSFETs with low on-resistance. We have already reported that the inversion channel mobility of 4H-SiC MOSFETs fabricated on the C(000(-),1) face was 72cm(2)/Vs, which is higher than the Si(0001) face. In this paper, we have investigated the effects of gate-oxidation temperature and H-2 post oxidation annealing on the D-it of n-type MOS capacitors and the inversion channel mobility of 4H-SiC MOSFETs fabricated on the C(000(-),1) face. The Dit is reduced and the inversion channel mobility is improved as the gate-oxidation temperature decreases. The inversion channel mobility of 4H-SiC MOSFETs with the gate-oxide film grown at 900degreesC is 118cm(2)/Vs. Furthermore, using H-2 POA, we have succeeded in the inversion channel mobility as high as 127cm(2)/Vs. This means that the C(000(-),1) face would be capable of SiC power MOSFETs with the high blocking voltage.