This article demonstrates the integration of imprint lithography into nanoelectronic device fabrication. We present a quantum point contact (QPC) with split gates patterned by imprint lithography. The semiconductor substrate is a modulation-doped GaAs/AlGaAs heterostructure with the two-dimensional electron gas located about 90 nm below the surface. A Si mold with a split-gate pattern is embossed into a poly(methylmethacrylate) film located on top of the semiconductor. The Schottky gates are fabricated by metal evaporation and liftoff. The gate tip separation ranges from 120 to 600 nm. Transport studies performed at T=2 K show conductance quantization with varying gate voltages. Measurements performed on a reference QPC with gates defined by electron beam lithography show similar results. This indicates that the imprint does not affect the electronic performance of the semiconductor.