Ultra-thin-body silicon-on-insulator (UTB-SOI) is one of the most promising candidates for future CMOs technologies with minimum feature sizes below 50 nm [1]. In this paper we analyze the impact of this emerging CMOs device concept on the performance of a representative selection of various digital CMOs circuits under different load conditions for typical ASIC/SOC applications. For compact modeling a physics-based fully depleted Sol model is used [2] and combined with a technology scenario assuming an undoped Si-body, elevated source-drain regions, and midgap gate workfunction. (C) 2003 Elsevier Science Ltd. All rights reserved.