| 학회 | 한국재료학회 |
| 학술대회 | 2006년 봄 (05/19 ~ 05/20, 경상대학교 ) |
| 권호 | 12권 1호 |
| 발표분야 | 전자재료 |
| 제목 | Investigation of Wafer Level Bonding for Si Based Packaging |
| 초록 | Recently, wafer level packaging (WLP) received lots of attention in system because it shows the potential to reduce packaging cost, while the yield of devices after dicing and packaging can be increased. In this study, we newly proposed WLP for light emitted diodes(LED) using MEMS technology. Our silicon package structure is composed of base and reflector cup. The role of base is that settle LED chip at desired position and supply electrical interconnection for LED operation. Reflector cup was formed by an-isotropic wet etching. Package platform could be fabricated by eutectic bonding between base and reflector cup using AuSn. We carried out process using six sigma methodology. We first decided 2 factors and 3 levels by design of experiment(DOE). One factor is the kind of metal model. The other is the shape of pattern. It was used that three-kind metal models are Au (cup), AuSn (cup), and AuSn (base). The bonding strength is measured using a die shear strength tester. It carried out in the repetition experiment by a unit of 3 times. As a result of this test, the AuSn(base) metal model and the No.3 pattern were applied by the optimal condition. We set the value of the low limit at shear strength 950g/mm2 for applying sigma level. This value is a generally used for eutectic bonding packages. The experiment results have 3.13 sigma level(95% yield). In this paper, We show the final LED package which is finished up to LED attach, wire bonding, encapsulation, etc. This wafer level bonding process demonstrates its promising potential at the wafer level packaging in LED packaging. |
| 저자 | Ji Hyun Park1, Sung Jun Lee2 |
| 소속 | 1Central R&D Institute, 2Samsung Electro-Mechanics Co. |
| 키워드 | wafer; bonding; packaging; LED |
