검색결과 : 3건
| No. | Article |
|---|---|
| 1 |
Enhanced dynamic threshold voltage UTBB SOI nMOSFETs Sasaki KRA, Manini MB, Simoen E, Claeys C, Martino JA Solid-State Electronics, 112, 19, 2015 |
| 2 |
Improved retention times in UTBOX nMOSFETs for 1T-DRAM applications Sasaki KRA, Nicoletti T, Almeida LM, dos Santos SD, Nissimoff A, Aoulaiche M, Simoen E, Claeys C, Martino JA Solid-State Electronics, 97, 30, 2014 |
| 3 |
Optimizing the front and back biases for the best sense margin and retention time in UTBOX FBRAM Almeida LM, Sasaki KRA, Caillat C, Aoulaiche M, Collaert N, Jurczak M, Simoen E, Claeys C, Martino JA Solid-State Electronics, 90, 149, 2013 |