검색결과 : 12건
No. | Article |
---|---|
1 |
Charge pumping and DCIV currents in SOI FinFETs Zhang EX, Fleetwood DM, Francis SA, Zhang CX, El-Mamouni F, Schrimpf RD Solid-State Electronics, 78, 75, 2012 |
2 |
Effects of fin width on memory windows in FinFET ZRAMs Zhang EX, Fleetwood DM, Alles ML, Schrimpf RD, Mamouni FE, Xiong W, Cristoloveanu S Solid-State Electronics, 54(10), 1155, 2010 |
3 |
An area efficient body contact for low and high voltage SOI MOSFET devices Daghighi A, Osman M, Imam MA Solid-State Electronics, 52(2), 196, 2008 |
4 |
Low-frequency noise in silicon-on-insulator devices and technologies Simoen E, Mercha A, Claey C, Lukyanchikova N Solid-State Electronics, 51(1), 16, 2007 |
5 |
Electron valence-band tunnelling excess noise in twin-gate silicon-on-insulator MOSFETs Simoen E, Claeys C, Lukyanchikova N, Garbar N, Smolanka A, Der Agopian PG, Martino JA Solid-State Electronics, 50(1), 52, 2006 |
6 |
On the great potential of non-doped MOSFETs for analog applications in partially-depleted SOICMOS process Kilchytska V, Levacq D, Vancaillie L, Flandre D Solid-State Electronics, 49(5), 708, 2005 |
7 |
Performance assessment of scaled strained-Si channel-on-insulator (SSOI) CMOS Kim K, Chuang CT, Rim K, Joshi RV Solid-State Electronics, 48(2), 239, 2004 |
8 |
A physical model for gate-to-body tunneling current and its effects on floating-body PD/SOI CMOS devices and circuits Yang JW, Fossum JG, Workman GO, Huang CL Solid-State Electronics, 48(2), 259, 2004 |
9 |
Impact of gate tunneling floating-body charging on drain current transients of 0.10 mu m-CMOS partially depleted SOI MOSFETs Rafi JM, Mercha A, Simoen E, Claeys C Solid-State Electronics, 48(7), 1211, 2004 |
10 |
Power analysis of strained-Si device s/circuits Kim K, Joshi RV, Chuang CT Solid-State Electronics, 48(8), 1453, 2004 |